There are in general three types of printed circuit board testers in the prior art, namely, bare board testers, in-circuit testers, and functional testers. The bare board testers as their name implies merely test the boards themselves prior to assembly. These testers are the least expensive, requiring the least programming, and they are the fastest acting and are capable of finding a high percentage of possible board defects. In-circuit testers test the fully assembled boards. These in-circuit testers are more expensive, slower, and require more extensive programming than the bare board testers. In-circuit testers find a small percentage more faults than bare board testers, because they test the components as well as the connections between the components. Functional testers typically test the circuit boards through their edge connectors. They are roughly equivalent to in-circuit testers in initial cost but may be more difficult to program. Functional testers find a different class of faults than bare board and in-circuit testers because they look for functional failures rather than component failures.
Recently, a tester has appeared in the prior art which is commonly referred to as a manufacturing defects tester. The manufacturing defects tester tests an assembled printed circuit board, primarily to assure that all of the components are the correct ones and that all of the components have been correctly inserted into the board. This tester also tests the connections between the various components, and makes parametric tests on some of the components, particularly resistors. The manufacturing defects tester is attractive because testing for assembly defects is potentially much faster and less costly than in-circuit or functional testing.
As pointed out in U.S. Pat. No. 4,538,104, the General Electric Company introduced the first in-circuit tester over thirty years ago. The in-circuit tester was designed to analyze the individual components in an electrical network. A particular fixture formed the basis for in-circuit testing. This fixture, known as a "Bed-Of-Nails", generally included spring probes projecting out its top, and the printed circuit board under test was set on top of the fixture. The fixture was designed such that a space existed between the bottom and top of the fixture, and an apparatus for drawing a vacuum in that space was connected thereto. Then, a vacuum was applied to the circuit board through the penetrations for the spring probes drawing the circuit board down against and making electrical contact with the spring probes. The spring probes were electrically connected by circuit wiring to an in-circuit electric analyzer which performed a circuit analysis upon the vacuum held circuit board.
A typical electronic circuit consists of components and interconnects. Components have two or more leads, and for the purposes of this specification, are limited to passive-linear devices. Examples are resistors, capacitors, and inductors. Interconnects convey electrical energy and potential between component leads. Examples of interconnects are wires and printed circuit board traces. A set of interconnected component leads is called a circuit node. A connectivity list defines all the nodes for a given electronic circuit.
A drawback of all the prior art in-circuit testers is the need for physical guarding. For electrical reasons, components embedded in electronic circuits cannot be measured accurately without some form of guarding to isolate the components under test from other parallel components. In the prior art in-circuit testing machines, physical guarding is used, as mentioned above. Guard pins must be assigned by engineers or other highly trained personnel. Up to the present, computer programs to assign guard pins have not been completely successful. It is physical guarding which causes present day in-circuit testers to require complex programming, and to be difficult to operate.
An important feature of the tester of the present invention is that it does not require physical guarding. Instead, the computer incorporated into the tester of the invention generates and accepts a test program which is a matrix describing the connectivity of the entire electronic circuit.
The computer inverts the matrix giving a linear transformation from node-oriented admittance measurements to component values. Given the measurements, component values can be computed using matrix multiplication and checked against expected values.
Another important feature is the ability of a computer included in the tester of the present invention to generate the test program, i.e., construct the matrix based solely on a connectivity list and component list description. The connectivity may be self-learned, and the component list description is a clerical function entered by an unskilled operator. Therefore, no actual programming need be done, and the tester can be operated without the need for engineers or programmers.
In other words, the physical guarding used in the prior art in-circuit testers diverts unwanted currents away from the measurements. The tester of the present invention uses mathematical rather than physical guarding and computes the value of the unwanted current in the measurement and mathematically subtracts that value from the value of the wanted current to arrive at the desired result. The process is carried out entirely by computer in the tester of the invention, and it does not require highly trained personnel. In addition to eliminating the main expense and difficulty in component measurement of the prior art in-circuit testers, the mathematical guarding utilized in the tester of the present invention results in increased accuracy. Of course, the actual mathematics may be implemented in terms of currents, voltages, impedances, or admittances without departing from the concept of the invention.
The term "mathematical guarding" as used in this specification is a technique for computing the values of passive-linear components in an arbitrary electronic circuit using only complex-valued admittance measurements made between defined sets of circuit nodes. There are two forms of mathematical guarding which select slightly different sets of nodes. The precise selection of nodes is given by Algorithms 1-3, which are set forth subsequently in this specification.
Each circuit node must be probed in at least one location. Such a probed location is sometimes called a (test) point or pin. Each test point has a unique number, or address, used for identification. For the current invention, it is typical to probe all component leads on every node, although this is not necessary. One test point per node is sufficient.
For the first form of mathematical guarding, the connectivitiy and component description defines the name of each node and the number of the test point that probes the node, e.g. (node "30a" 1). For the second form of mathematical guarding, a user language (program) defines the name of each component and the numbers of the test points that probe the component's leads, e.g. (component "R1" 1 2).
The use of the designation "Manufacturing Defects Tester" to describe the type of tester with which the present invention is concerned is not really appropriate because the syntax is incorrect. The tester of the invention does not test defects, rather, it tests an assembled board to determine defects. A better designation for the tester of the invention would be "Board Assembly Tester", and that designation will be used in the following description to identify the tester of the invention.
Presently available manufacturing defects testers are predominantly low cost machines, and a small test point count is common. Accordingly, one of the objectives of the board assembly tester of the present invention is to provide a large test point count to permit full connectivity testing and universal grid fixturing.
Other objectives of the present invention are to provide a board assembly tester which includes a complete self-learn capability requiring no operator input except a component list; which uses mathematical rather than physical guarding; which has extremely high speed and high throughput; and which has the ability to test connectivity completely, to make accurate parametric measurements of resistors, capacitors and inductors, and to test diodes and transistors for function and integrated circuits for correct type and correct insertion; and which has the ability with no programming except a component list entry, to test assembled boards and to find a higher percentage of all possible defects than any of the prior art testers.